MASKSS=B_0x0
RTC alarm A sub second register
| SS | Sub seconds value This value is compared with the contents of the synchronous prescaler counter to determine if alarm A is to be activated. Only bits 0 up MASKSS-1 are compared. |
| MASKSS | Mask the most-significant bits starting at this bit 2: SS[14:2] are don’t care in alarm A comparison. Only SS[1:0] are compared. 3: SS[14:3] are don’t care in alarm A comparison. Only SS[2:0] are compared. … 12: SS[14:12] are don’t care in alarm A comparison. SS[11:0] are compared. 13: SS[14:13] are don’t care in alarm A comparison. SS[12:0] are compared. 14: SS[14] is don’t care in alarm A comparison. SS[13:0] are compared. 15: All 15 SS bits are compared and must match to activate alarm. The overflow bits of the synchronous counter (bits 15) is never compared. This bit can be different from 0 only after a shift operation. Note: The overflow bits of the synchronous counter (bits 15) is never compared. This bit can be different from 0 only after a shift operation. 0 (B_0x0): No comparison on sub seconds for alarm A. The alarm is set when the seconds unit is incremented (assuming that the rest of the fields match). 1 (B_0x1): SS[14:1] are don’t care in alarm A comparison. Only SS[0] is compared. |