STMicroelectronics /STM32G0B0 /TAMP /TAMP_CR1

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Interpret as TAMP_CR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TAMP1E 0 (B_0x0)TAMP2E 0 (B_0x0)TAMP3E 0 (B_0x0)ITAMP3E 0 (B_0x0)ITAMP4E 0 (B_0x0)ITAMP5E 0 (B_0x0)ITAMP6E

TAMP2E=B_0x0, TAMP3E=B_0x0, TAMP1E=B_0x0, ITAMP5E=B_0x0, ITAMP6E=B_0x0, ITAMP3E=B_0x0, ITAMP4E=B_0x0

Description

TAMP control register 1

Fields

TAMP1E

Tamper detection on TAMP_IN1 enable

0 (B_0x0): Tamper detection on TAMP_IN1 is disabled.

1 (B_0x1): Tamper detection on TAMP_IN1 is enabled.

TAMP2E

Tamper detection on TAMP_IN2 enable

0 (B_0x0): Tamper detection on TAMP_IN2 is disabled.

1 (B_0x1): Tamper detection on TAMP_IN2 is enabled.

TAMP3E

Tamper detection on TAMP_IN3 enable

0 (B_0x0): Tamper detection on TAMP_IN3 is disabled.

1 (B_0x1): Tamper detection on TAMP_IN3 is enabled.

ITAMP3E

Internal tamper 3 enable: LSE monitoring

0 (B_0x0): Internal tamper 3 disabled.

1 (B_0x1): Internal tamper 3 enabled: a tamper is generated when the LSE frequency is below or above thresholds.

ITAMP4E

Internal tamper 4 enable: HSE monitoring

0 (B_0x0): Internal tamper 4 disabled.

1 (B_0x1): Internal tamper 4 enabled. a tamper is generated when the HSE frequency is below or above thresholds.

ITAMP5E

Internal tamper 5 enable: RTC calendar overflow

0 (B_0x0): Internal tamper 5 disabled.

1 (B_0x1): Internal tamper 5 enabled: a tamper is generated when the RTC calendar reaches its maximum value, on the 31st of December 99, at 23:59:59. The calendar is then frozen and cannot overflow.

ITAMP6E

Internal tamper 6 enable: ST manufacturer readout

0 (B_0x0): Internal tamper 6 disabled.

1 (B_0x1): Internal tamper 6 enabled: a tamper is generated in case of ST manufacturer readout.

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