STMicroelectronics /STM32G0B0 /WWDG /WWDG_CFR

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Interpret as WWDG_CFR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0W0 (EWI)EWI 0 (B_0x0)WDGTB

WDGTB=B_0x0

Description

Configuration register

Fields

W

7-bit window value These bits contain the window value to be compared with the down-counter.

EWI

Early wakeup interrupt When set, an interrupt occurs whenever the counter reaches the value 0x40. This interrupt is only cleared by hardware after a reset.

WDGTB

Timer base The timebase of the prescaler can be modified as follows:

0 (B_0x0): CK Counter Clock (PCLK div 4096) div 1

1 (B_0x1): CK Counter Clock (PCLK div 4096) div 2

2 (B_0x2): CK Counter Clock (PCLK div 4096) div 4

3 (B_0x3): CK Counter Clock (PCLK div 4096) div 8

4 (B_0x4): CK Counter Clock (PCLK div 4096) div 16

5 (B_0x5): CK Counter Clock (PCLK div 4096) div 32

6 (B_0x6): CK Counter Clock (PCLK div 4096) div 64

7 (B_0x7): CK Counter Clock (PCLK div 4096) div 128

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