EFBI=B_0x0, DAR=B_0x0, CCE=B_0x0, PXHD=B_0x0, CSR=B_0x0, ASM=B_0x0, BRSE=B_0x0, TXP=B_0x0, TEST=B_0x0, MON=B_0x0, CSA=B_0x0, INIT=B_0x0, FDOE=B_0x0, NISO=B_0x0
FDCAN CC control register
| INIT | Initialization 0 (B_0x0): Normal operation 1 (B_0x1): Initialization started |
| CCE | Configuration change enable 0 (B_0x0): The CPU has no write access to the protected configuration registers. 1 (B_0x1): The CPU has write access to the protected configuration registers (while CCCR.INIT = 1). |
| ASM | ASM restricted operation mode The restricted operation mode is intended for applications that adapt themselves to different CAN bit rates. The application tests different bit rates and leaves the Restricted Operation Mode after it has received a valid frame. In the optional Restricted Operation Mode the node is able to transmit and receive data and remote frames and it gives acknowledge to valid frames, but it does not send active error frames or overload frames. In case of an error condition or overload condition, it does not send dominant bits, instead it waits for the occurrence of bus idle condition to resynchronize itself to the CAN communication. The error counters are not incremented. Bit ASM can only be set by software when both CCE and INIT are set to 1. The bit can be reset by the software at any time. 0 (B_0x0): Normal CAN operation 1 (B_0x1): Restricted Operation Mode active |
| CSA | Clock stop acknowledge 0 (B_0x0): No clock stop acknowledged 1 (B_0x1): FDCAN may be set in power down by stopping APB clock and kernel clock. |
| CSR | Clock stop request 0 (B_0x0): No clock stop requested 1 (B_0x1): Clock stop requested. When clock stop is requested, first INIT and then CSA is set after all pending transfer requests have been completed and the CAN bus reached idle. |
| MON | Bus monitoring mode Bit MON can only be set by software when both CCE and INIT are set to 1. The bit can be reset by the Host at any time. 0 (B_0x0): Bus monitoring mode disabled 1 (B_0x1): Bus monitoring mode enabled |
| DAR | Disable automatic retransmission 0 (B_0x0): Automatic retransmission of messages not transmitted successfully enabled 1 (B_0x1): Automatic retransmission disabled |
| TEST | Test mode enable 0 (B_0x0): Normal operation, register TEST holds reset values 1 (B_0x1): Test Mode, write access to register TEST enabled |
| FDOE | FD operation enable 0 (B_0x0): FD operation disabled 1 (B_0x1): FD operation enabled |
| BRSE | FDCAN bit rate switching 0 (B_0x0): Bit rate switching for transmissions disabled 1 (B_0x1): Bit rate switching for transmissions enabled |
| PXHD | Protocol exception handling disable 0 (B_0x0): Protocol exception handling enabled 1 (B_0x1): Protocol exception handling disabled |
| EFBI | Edge filtering during bus integration 0 (B_0x0): Edge filtering disabled 1 (B_0x1): Two consecutive dominant tq required to detect an edge for hard synchronization |
| TXP | If this bit is set, the FDCAN pauses for two CAN bit times before starting the next transmission after successfully transmitting a frame. 0 (B_0x0): disabled 1 (B_0x1): enabled |
| NISO | Non ISO operation If this bit is set, the FDCAN uses the CAN FD frame format as specified by the Bosch CAN FD Specification V1.0. 0 (B_0x0): CAN FD frame format according to ISO11898-1 1 (B_0x1): CAN FD frame format according to Bosch CAN FD Specification V1.0 |