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STMicroelectronics /STM32G0C1 /FDCAN1 /FDCAN_TXBCR

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Interpret as FDCAN_TXBCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CR

CR=B_0x0

Description

FDCAN Tx buffer cancellation request register

Fields

CR

Cancellation request Each Tx buffer has its own cancellation request bit. Writing a 1 sets the corresponding CR bit; writing a 0 has no impact. This enables the Host to set cancellation requests for multiple Tx buffers with one write to TXBCR. The bits remain set until the corresponding TXBRP bit is reset.

0 (B_0x0): No cancellation pending

1 (B_0x1): Cancellation pending

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data