STMicroelectronics /STM32G0C1 /RCC /IOPENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as IOPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOAEN)GPIOAEN 0 (GPIOBEN)GPIOBEN 0 (GPIOCEN)GPIOCEN 0 (GPIODEN)GPIODEN 0 (GPIOEEN)GPIOEEN 0 (GPIOFEN)GPIOFEN

Description

GPIO clock enable register

Fields

GPIOAEN

I/O port A clock enable during Sleep mode

GPIOBEN

I/O port B clock enable during Sleep mode

GPIOCEN

I/O port C clock enable during Sleep mode

GPIODEN

I/O port D clock enable during Sleep mode

GPIOEEN

I/O port E clock enable during Sleep mode

GPIOFEN

I/O port F clock enable during Sleep mode

Links

()