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STMicroelectronics /STM32G0C1 /USB /USB_LPMCSR

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Interpret as USB_LPMCSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LPMEN)LPMEN 0 (DEVICE_MODE0x0)LPMACK 0 (REMWAKE)REMWAKE 0BESL

LPMACK=DEVICE_MODE0x0

Description

LPM control and status register

Fields

LPMEN

LPM support enable Device mode This bit is set by the software to enable the LPM support within the USB device. If this bit is at '0 no LPM transactions are handled. Host mode Software sets this bit to transmit an LPM transaction to device. This bit is cleared by hardware, simultaneous with L1REQ flag set, when device answer is received
LPMACK

LPM Token acknowledge enable The NYET/ACK will be returned only on a successful LPM transaction: No errors in both the EXT token and the LPM token (else ERROR) A valid bLinkState = 0001B (L1) is received (else STALL) This bit contains the device answer to the LPM transaction. It mast be evaluated following the L1REQ interrupt.

0 (HOST_MODE0x0): NYET answer

0 (DEVICE_MODE0x0): the valid LPM Token will be NYET.

1 (HOST_MODE0x1): ACK answer

1 (DEVICE_MODE0x1): the valid LPM Token will be ACK.
REMWAKE

bRemoteWake value Device mode This bit contains the bRemoteWake value received with last ACKed LPM Token Host mode This bit contains the bRemoteWake value transmitted with the LPM transaction
BESL

BESL value Device mode These bits contain the BESL value received with last ACKed LPM Token Host mode These bits contain the BESL value transmitted with the LPM transaction

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data