RCC_AHB3SMENR

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Interpret as RCC_AHB3SMENR

QSPISMEN=B_0x0, FMCSMEN=B_0x0

AHB3 peripheral clocks enable in Sleep and Stop modes register

FMCSMEN	Flexible static memory controller clocks enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): FSMC clocks disabled by the clock gating⁽¹⁾ during Sleep and Stop modes 1 (B_0x1): FSMC clocks enabled by the clock gating⁽¹⁾ during Sleep and Stop modes
QSPISMEN	QUADSPI memory interface clock enable during Sleep and Stop modes Set and cleared by software. 0 (B_0x0): QUADSPI clock disabled by the clock gating during Sleep and Stop modes 1 (B_0x1): QUADSPI clock enabled by the clock gating⁽¹⁾ during Sleep and Stop modes

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