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STMicroelectronics /STM32G484xx /ADC1 /SMPR1

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Interpret as SMPR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SMP00SMP10SMP20SMP30SMP40SMP50SMP60SMP70SMP80SMP90 (SMPPLUS)SMPPLUS

Description

sample time register 1

Fields

SMP0

SMP0
SMP1

SMP1
SMP2

SMP2
SMP3

SMP3
SMP4

SMP4
SMP5

SMP5
SMP6

SMP6
SMP7

SMP7
SMP8

SMP8
SMP9

SMP9
SMPPLUS

Addition of one clock cycle to the sampling time

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data