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STMicroelectronics /STM32G4A1xx /DAC1 /DAC_DHR12L1

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Interpret as DAC_DHR12L1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DACC1DHR0DACC1DHRB

Description

DAC channel1 12-bit left aligned data holding register

Fields

DACC1DHR

DAC channel1 12-bit left-aligned data These bits are written by software which specifies 12-bit data for DAC channel1.
DACC1DHRB

DAC channel1 12-bit left-aligned data B

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data