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STMicroelectronics /STM32G4A1xx /FLASH /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PG)PG 0 (PER)PER 0 (MER1)MER1 0PNB0 (STRT)STRT 0 (OPTSTRT)OPTSTRT 0 (FSTPG)FSTPG 0 (EOPIE)EOPIE 0 (ERRIE)ERRIE 0 (RDERRIE)RDERRIE 0 (OBL_LAUNCH)OBL_LAUNCH 0 (SEC_PROT1)SEC_PROT1 0 (OPTLOCK)OPTLOCK 0 (LOCK)LOCK

Description

Flash control register

Fields

PG

Programming
PER

Page erase
MER1

Bank 1 Mass erase
PNB

Page number
STRT

Start
OPTSTRT

Options modification start
FSTPG

Fast programming
EOPIE

End of operation interrupt enable
ERRIE

Error interrupt enable
RDERRIE

PCROP read error interrupt enable
OBL_LAUNCH

Force the option byte loading
SEC_PROT1

SEC_PROT1
OPTLOCK

Options Lock
LOCK

FLASH_CR Lock

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data