STMicroelectronics /STM32G4A1xx /RCC /RCC_APB1ENR2

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Interpret as RCC_APB1ENR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LPUART1EN 0 (B_0x0)I2C4EN 0 (B_0x0)UCPD1EN

I2C4EN=B_0x0, LPUART1EN=B_0x0, UCPD1EN=B_0x0

Description

APB1 peripheral clock enable register 2

Fields

LPUART1EN

Low power UART 1 clock enable Set and cleared by software.

0 (B_0x0): LPUART1 clock disable

1 (B_0x1): LPUART1 clock enable

I2C4EN

I2C4 clock enable Set and cleared by software

0 (B_0x0): I2C4 clock disabled

1 (B_0x1): I2C4 clock enabled

UCPD1EN

UCPD1 clock enable Set and cleared by software.

0 (B_0x0): UCPD1 clock disable

1 (B_0x1): UCPD1 clock enable

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