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STMicroelectronics /STM32GBK1CBT6 /RCC /RCC_APB1RSTR2

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Interpret as RCC_APB1RSTR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LPUART1RST 0 (B_0x0)I2C4RST 0 (B_0x0)UCPD1RST

UCPD1RST=B_0x0, I2C4RST=B_0x0, LPUART1RST=B_0x0

Description

APB1 peripheral reset register 2

Fields

LPUART1RST

Low-power UART 1 reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset LPUART1
I2C4RST

I2C4 reset Set and cleared by software

0 (B_0x0): No effect

1 (B_0x1): Reset I2C4
UCPD1RST

UCPD1 reset Set and cleared by software.

0 (B_0x0): No effect

1 (B_0x1): Reset UCPD1

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data