STMicroelectronics /STM32H750x /FDCAN1 /FDCAN_TTIR

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Interpret as FDCAN_TTIR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SBC)SBC 0 (SMC)SMC 0 (CSM)CSM 0 (SOG)SOG 0 (RTMI)RTMI 0 (TTMI)TTMI 0 (SWE)SWE 0 (GTW)GTW 0 (GTD)GTD 0 (GTE)GTE 0 (TXU)TXU 0 (TXO)TXO 0 (SE1)SE1 0 (SE2)SE2 0 (ELC)ELC 0 (IWTG)IWTG 0 (WT)WT 0 (AW)AW 0 (CER)CER

Description

FDCAN TT Interrupt Register

Fields

SBC

Start of Basic Cycle

SMC

Start of Matrix Cycle

CSM

Change of Synchronization Mode

SOG

Start of Gap

RTMI

Register Time Mark Interrupt.

TTMI

Trigger Time Mark Event Internal

SWE

Stop Watch Event

GTW

Global Time Wrap

GTD

Global Time Discontinuity

GTE

Global Time Error

TXU

Tx Count Underflow

TXO

Tx Count Overflow

SE1

Scheduling Error 1

SE2

Scheduling Error 2

ELC

Error Level Changed.

IWTG

Initialization Watch Trigger

WT

Watch Trigger

AW

Application Watchdog

CER

Configuration Error

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