STMicroelectronics /STM32H7A3x /DFSDM /DFSDM_CHCFG0R1

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Interpret as DFSDM_CHCFG0R1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SITP 0SPICKSEL 0 (SCDEN)SCDEN 0 (CKABEN)CKABEN 0 (CHEN)CHEN 0 (CHINSEL)CHINSEL 0DATMPX 0DATPACK 0CKOUTDIV0 (CKOUTSRC)CKOUTSRC 0 (DFSDMEN)DFSDMEN

Description

DFSDM channel configuration 0 register 1

Fields

SITP

Serial interface type for channel 0

SPICKSEL

SPI clock select for channel 0

SCDEN

Short-circuit detector enable on channel 0

CKABEN

Clock absence detector enable on channel 0

CHEN

Channel 0 enable

CHINSEL

Channel inputs selection

DATMPX

Input data multiplexer for channel 0

DATPACK

Data packing mode in DFSDM_CHDATINyR register

CKOUTDIV

Output serial clock divider

CKOUTSRC

Output serial clock source selection

DFSDMEN

Global enable for DFSDM interface

Links

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