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STMicroelectronics /STM32H7A3x /Ethernet_MAC /DMAMR

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Interpret as DMAMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SWR)SWR 0 (DA)DA 0 (TXPR)TXPR 0PR0 (INTM)INTM

Description

DMA mode register

Fields

SWR

Software Reset
DA

DMA Tx or Rx Arbitration Scheme
TXPR

Transmit priority
PR

Priority ratio
INTM

Interrupt Mode

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data