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STMicroelectronics /STM32H7A3x /Ethernet_MAC /MACL3L4C1R

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Interpret as MACL3L4C1R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (L3PEN1)L3PEN1 0 (L3SAM1)L3SAM1 0 (L3SAIM1)L3SAIM1 0 (L3DAM1)L3DAM1 0 (L3DAIM1)L3DAIM1 0L3HSBM10L3HDBM10 (L4PEN1)L4PEN1 0 (L4SPM1)L4SPM1 0 (L4SPIM1)L4SPIM1 0 (L4DPM1)L4DPM1 0 (L4DPIM1)L4DPIM1

Description

L3 and L4 control 1 register

Fields

L3PEN1

L3PEN1
L3SAM1

L3SAM1
L3SAIM1

L3SAIM1
L3DAM1

L3DAM1
L3DAIM1

L3DAIM1
L3HSBM1

L3HSBM1
L3HDBM1

L3HDBM1
L4PEN1

L4PEN1
L4SPM1

L4SPM1
L4SPIM1

L4SPIM1
L4DPM1

L4DPM1
L4DPIM1

L4DPIM1

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data