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STMicroelectronics /STM32H7A3x /Flash /CCR1

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Interpret as CCR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLR_EOP1)CLR_EOP1 0 (CLR_WRPERR1)CLR_WRPERR1 0 (CLR_PGSERR1)CLR_PGSERR1 0 (CLR_STRBERR1)CLR_STRBERR1 0 (CLR_INCERR1)CLR_INCERR1 0 (CLR_OPERR1)CLR_OPERR1 0 (CLR_RDPERR1)CLR_RDPERR1 0 (CLR_RDSERR1)CLR_RDSERR1 0 (CLR_SNECCERR1)CLR_SNECCERR1 0 (CLR_DBECCERR1)CLR_DBECCERR1 0 (CLR_CRCEND1)CLR_CRCEND1

Description

FLASH clear control register for bank 1

Fields

CLR_EOP1

Bank 1 EOP1 flag clear bit
CLR_WRPERR1

Bank 1 WRPERR1 flag clear bit
CLR_PGSERR1

Bank 1 PGSERR1 flag clear bi
CLR_STRBERR1

Bank 1 STRBERR1 flag clear bit
CLR_INCERR1

Bank 1 INCERR1 flag clear bit
CLR_OPERR1

Bank 1 OPERR1 flag clear bit
CLR_RDPERR1

Bank 1 RDPERR1 flag clear bit
CLR_RDSERR1

Bank 1 RDSERR1 flag clear bit
CLR_SNECCERR1

Bank 1 SNECCERR1 flag clear bit
CLR_DBECCERR1

Bank 1 DBECCERR1 flag clear bit
CLR_CRCEND1

Bank 1 CRCEND1 flag clear bit

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data