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STMicroelectronics /STM32H7A3x /Flash /OPTSR_PRG

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Interpret as OPTSR_PRG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BOR_LEV 0 (IWDG1_HW)IWDG1_HW 0 (nRST_STOP_D1)nRST_STOP_D1 0 (nRST_STBY_D1)nRST_STBY_D1 0RDP0 (FZ_IWDG_STOP)FZ_IWDG_STOP 0 (FZ_IWDG_SDBY)FZ_IWDG_SDBY 0ST_RAM_SIZE 0 (SECURITY)SECURITY 0 (RSS1)RSS1 0 (RSS2)RSS2 0 (IO_HSLV)IO_HSLV 0 (SWAP_BANK_OPT)SWAP_BANK_OPT

Description

FLASH option status register

Fields

BOR_LEV

BOR reset level option configuration bits
IWDG1_HW

IWDG1 option configuration bit
nRST_STOP_D1

Option byte erase after D1 DStop option configuration bit
nRST_STBY_D1

Option byte erase after D1 DStandby option configuration bit
RDP

Readout protection level option configuration byte
FZ_IWDG_STOP

IWDG Stop mode freeze option configuration bit
FZ_IWDG_SDBY

IWDG Standby mode freeze option configuration bit
ST_RAM_SIZE

DTCM size select option configuration bits
SECURITY

Security option configuration bit
RSS1

User option configuration bit 1
RSS2

User option configuration bit 2
IO_HSLV

I/O high-speed at low-voltage (PRODUCT_BELOW_25V)
SWAP_BANK_OPT

Bank swapping option configuration bit

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data