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STMicroelectronics /STM32H7A3x /RCC /D1CFGR

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Interpret as D1CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HPRE0D1PPRE 0D1CPRE

Description

RCC Domain 1 Clock Configuration Register

Fields

HPRE

D1 domain AHB prescaler
D1PPRE

D1 domain APB3 prescaler
D1CPRE

D1 domain Core prescaler

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data