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STMicroelectronics /STM32H7A3x /RCC /D2CFGR

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Interpret as D2CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0D2PPRE1 0D2PPRE2

Description

RCC Domain 2 Clock Configuration Register

Fields

D2PPRE1

D2 domain APB1 prescaler
D2PPRE2

D2 domain APB2 prescaler

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data