STMicroelectronics /STM32H7A3x /SPI1 /SR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXP)RXP 0 (TXP)TXP 0 (DXP)DXP 0 (EOT)EOT 0 (TXTF)TXTF 0 (UDR)UDR 0 (OVR)OVR 0 (CRCE)CRCE 0 (TIFRE)TIFRE 0 (MODF)MODF 0 (TSERF)TSERF 0 (SUSP)SUSP 0 (TXC)TXC 0RXPLVL 0 (RXWNE)RXWNE 0CTSIZE

Description

Status Register

Fields

RXP

Rx-Packet available

TXP

Tx-Packet space available

DXP

Duplex Packet

EOT

End Of Transfer

TXTF

Transmission Transfer Filled

UDR

Underrun at slave transmission mode

OVR

Overrun

CRCE

CRC Error

TIFRE

TI frame format error

MODF

Mode Fault

TSERF

Additional number of SPI data to be transacted was reload

SUSP

SUSPend

TXC

TxFIFO transmission complete

RXPLVL

RxFIFO Packing LeVeL

RXWNE

RxFIFO Word Not Empty

CTSIZE

Number of data frames remaining in current TSIZE session

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