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STMicroelectronics /STM32H7B3x /BDMA2 /BDMA_CM0AR6

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Interpret as BDMA_CM0AR6

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0MA

Description

This register must not be written when the channel is enabled.

Fields

MA

Memory address Base address of the memory area from/to which the data will be read/written. When MSIZE is 01 (16-bit), the MA[0] bit is ignored. Access is automatically aligned to a half-word address. When MSIZE is 10 (32-bit), MA[1:0] are ignored. Access is automatically aligned to a word address.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data