STMicroelectronics /STM32H7B3x /FDCAN /FDCAN_ILS

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Interpret as FDCAN_ILS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RF0NL)RF0NL 0 (RF0WL)RF0WL 0 (RF0FL)RF0FL 0 (RF0LL)RF0LL 0 (RF1NL)RF1NL 0 (RF1WL)RF1WL 0 (RF1FL)RF1FL 0 (RF1LL)RF1LL 0 (HPML)HPML 0 (TCL)TCL 0 (TCFL)TCFL 0 (TEFL)TEFL 0 (TEFNL)TEFNL 0 (TEFWL)TEFWL 0 (TEFFL)TEFFL 0 (TEFLL)TEFLL 0 (TSWL)TSWL 0 (MRAFL)MRAFL 0 (TOOL)TOOL 0 (DRXL)DRXL 0 (BECL)BECL 0 (BEUL)BEUL 0 (ELOL)ELOL 0 (EPL)EPL 0 (EWL)EWL 0 (BOL)BOL 0 (WDIL)WDIL 0 (PEAL)PEAL 0 (PEDL)PEDL 0 (ARAL)ARAL

Description

FDCAN Interrupt Line Select Register

Fields

RF0NL

Rx FIFO 0 New Message Interrupt Line

RF0WL

Rx FIFO 0 Watermark Reached Interrupt Line

RF0FL

Rx FIFO 0 Full Interrupt Line

RF0LL

Rx FIFO 0 Message Lost Interrupt Line

RF1NL

Rx FIFO 1 New Message Interrupt Line

RF1WL

Rx FIFO 1 Watermark Reached Interrupt Line

RF1FL

Rx FIFO 1 Full Interrupt Line

RF1LL

Rx FIFO 1 Message Lost Interrupt Line

HPML

High Priority Message Interrupt Line

TCL

Transmission Completed Interrupt Line

TCFL

Transmission Cancellation Finished Interrupt Line

TEFL

Tx FIFO Empty Interrupt Line

TEFNL

Tx Event FIFO New Entry Interrupt Line

TEFWL

Tx Event FIFO Watermark Reached Interrupt Line

TEFFL

Tx Event FIFO Full Interrupt Line

TEFLL

Tx Event FIFO Element Lost Interrupt Line

TSWL

Timestamp Wraparound Interrupt Line

MRAFL

Message RAM Access Failure Interrupt Line

TOOL

Timeout Occurred Interrupt Line

DRXL

Message stored to Dedicated Rx Buffer Interrupt Line

BECL

Bit Error Corrected Interrupt Line

BEUL

Bit Error Uncorrected Interrupt Line

ELOL

Error Logging Overflow Interrupt Line

EPL

Error Passive Interrupt Line

EWL

Warning Status Interrupt Line

BOL

Bus_Off Status

WDIL

Watchdog Interrupt Line

PEAL

Protocol Error in Arbitration Phase Line

PEDL

Protocol Error in Data Phase Line

ARAL

Access to Reserved Address Line

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