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STMicroelectronics /STM32H7x5_CM4 /ADC3_Common /CDR2

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Interpret as CDR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RDATA_ALT

Description

ADC x common regular data register for 32-bit dual mode

Fields

RDATA_ALT

Regular data of the master/slave alternated ADCs

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data