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STMicroelectronics /STM32H7x5_CM4 /AXI /AXI_TARG1_FN_MOD2

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Interpret as AXI_TARG1_FN_MOD2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BYPASS_MERGE)BYPASS_MERGE

Description

AXI interconnect - TARG x bus matrix functionality 2 register

Fields

BYPASS_MERGE

Disable packing of beats to match the output data width

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data