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STMicroelectronics /STM32H7x5_CM4 /DCMI /ICR

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Interpret as ICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (FRAME_ISC)FRAME_ISC 0 (OVR_ISC)OVR_ISC 0 (ERR_ISC)ERR_ISC 0 (VSYNC_ISC)VSYNC_ISC 0 (LINE_ISC)LINE_ISC

Description

interrupt clear register

Fields

FRAME_ISC

Capture complete interrupt status clear
OVR_ISC

Overrun interrupt status clear
ERR_ISC

Synchronization error interrupt status clear
VSYNC_ISC

Vertical synch interrupt status clear
LINE_ISC

line interrupt status clear

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data