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STMicroelectronics /STM32H7x5_CM4 /Ethernet_MAC /MACISR

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Interpret as MACISR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PHYIS)PHYIS 0 (PMTIS)PMTIS 0 (LPIIS)LPIIS 0 (MMCIS)MMCIS 0 (MMCRXIS)MMCRXIS 0 (MMCTXIS)MMCTXIS 0 (TSIS)TSIS 0 (TXSTSIS)TXSTSIS 0 (RXSTSIS)RXSTSIS

Description

Interrupt status register

Fields

PHYIS

PHYIS
PMTIS

PMTIS
LPIIS

LPIIS
MMCIS

MMCIS
MMCRXIS

MMCRXIS
MMCTXIS

MMCTXIS
TSIS

TSIS
TXSTSIS

TXSTSIS
RXSTSIS

RXSTSIS

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data