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STMicroelectronics /STM32H7x5_CM4 /Ethernet_MAC /MACTSCR

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Interpret as MACTSCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TSENA)TSENA 0 (TSCFUPDT)TSCFUPDT 0 (TSINIT)TSINIT 0 (TSUPDT)TSUPDT 0 (TSADDREG)TSADDREG 0 (TSENALL)TSENALL 0 (TSCTRLSSR)TSCTRLSSR 0 (TSVER2ENA)TSVER2ENA 0 (TSIPENA)TSIPENA 0 (TSIPV6ENA)TSIPV6ENA 0 (TSIPV4ENA)TSIPV4ENA 0 (TSEVNTENA)TSEVNTENA 0 (TSMSTRENA)TSMSTRENA 0SNAPTYPSEL 0 (TSENMACADDR)TSENMACADDR 0 (CSC)CSC 0 (TXTSSTSM)TXTSSTSM

Description

Timestamp control Register

Fields

TSENA

TSENA
TSCFUPDT

TSCFUPDT
TSINIT

TSINIT
TSUPDT

TSUPDT
TSADDREG

TSADDREG
TSENALL

TSENALL
TSCTRLSSR

TSCTRLSSR
TSVER2ENA

TSVER2ENA
TSIPENA

TSIPENA
TSIPV6ENA

TSIPV6ENA
TSIPV4ENA

TSIPV4ENA
TSEVNTENA

TSEVNTENA
TSMSTRENA

TSMSTRENA
SNAPTYPSEL

SNAPTYPSEL
TSENMACADDR

TSENMACADDR
CSC

CSC
TXTSSTSM

TXTSSTSM

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data