Regviz

STMicroelectronics /STM32H7x5_CM4 /Flash /CCR2

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CCR2

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/STMicroelectronics/STM32H7x5_CM7/Flash/CCR2#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLR_EOP2)CLR_EOP2 0 (CLR_WRPERR2)CLR_WRPERR2 0 (CLR_PGSERR2)CLR_PGSERR2 0 (CLR_STRBERR2)CLR_STRBERR2 0 (CLR_INCERR2)CLR_INCERR2 0 (CLR_OPERR2)CLR_OPERR2 0 (CLR_RDPERR2)CLR_RDPERR2 0 (CLR_RDSERR1)CLR_RDSERR1 0 (CLR_SNECCERR2)CLR_SNECCERR2 0 (CLR_DBECCERR1)CLR_DBECCERR1 0 (CLR_CRCEND2)CLR_CRCEND2

Description

FLASH clear control register for bank 2

Fields

CLR_EOP2

Bank 1 EOP1 flag clear bit
CLR_WRPERR2

Bank 2 WRPERR1 flag clear bit
CLR_PGSERR2

Bank 2 PGSERR1 flag clear bi
CLR_STRBERR2

Bank 2 STRBERR1 flag clear bit
CLR_INCERR2

Bank 2 INCERR1 flag clear bit
CLR_OPERR2

Bank 2 OPERR1 flag clear bit
CLR_RDPERR2

Bank 2 RDPERR1 flag clear bit
CLR_RDSERR1

Bank 1 RDSERR1 flag clear bit
CLR_SNECCERR2

Bank 2 SNECCERR1 flag clear bit
CLR_DBECCERR1

Bank 1 DBECCERR1 flag clear bit
CLR_CRCEND2

Bank 2 CRCEND1 flag clear bit

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data