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STMicroelectronics /STM32H7x5_CM4 /RCC /CIFR

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Interpret as CIFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSIRDYF)LSIRDYF 0 (LSERDYF)LSERDYF 0 (HSIRDYF)HSIRDYF 0 (HSERDYF)HSERDYF 0 (CSIRDY)CSIRDY 0 (RC48RDYF)RC48RDYF 0 (PLL1RDYF)PLL1RDYF 0 (PLL2RDYF)PLL2RDYF 0 (PLL3RDYF)PLL3RDYF 0 (LSECSSF)LSECSSF 0 (HSECSSF)HSECSSF

Description

RCC Clock Source Interrupt Flag Register

Fields

LSIRDYF

LSI ready Interrupt Flag
LSERDYF

LSE ready Interrupt Flag
HSIRDYF

HSI ready Interrupt Flag
HSERDYF

HSE ready Interrupt Flag
CSIRDY

CSI ready Interrupt Flag
RC48RDYF

RC48 ready Interrupt Flag
PLL1RDYF

PLL1 ready Interrupt Flag
PLL2RDYF

PLL2 ready Interrupt Flag
PLL3RDYF

PLL3 ready Interrupt Flag
LSECSSF

LSE clock security system Interrupt Flag
HSECSSF

HSE clock security system Interrupt Flag

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data