STMicroelectronics /STM32H7x5_CM4 /RCC /D3CCIPR

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Interpret as D3CCIPR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LPUART1SRC 0I2C4SRC 0LPTIM2SRC 0LPTIM345SRC 0ADCSRC 0SAI4ASRC 0SAI4BSRC 0SPI6SRC

Description

RCC Domain 3 Kernel Clock Configuration Register

Fields

LPUART1SRC

LPUART1 kernel clock source selection

I2C4SRC

I2C4 kernel clock source selection

LPTIM2SRC

LPTIM2 kernel clock source selection

LPTIM345SRC

LPTIM3,4,5 kernel clock source selection

ADCSRC

SAR ADC kernel clock source selection

SAI4ASRC

Sub-Block A of SAI4 kernel clock source selection

SAI4BSRC

Sub-Block B of SAI4 kernel clock source selection

SPI6SRC

SPI6 kernel clock source selection

Links

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