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STMicroelectronics /STM32H7x7_CM4 /SPDIFRX /DR_01

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Interpret as DR_01

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PE)PE 0 (V)V0 (U)U0 (C)C0PT0DR

Description

Data input register

Fields

PE

Parity Error bit
V

Validity bit
U

User bit
C

Channel Status bit
PT

Preamble Type
DR

Data value

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data