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STMicroelectronics /STM32H7x7_CM7 /Ethernet_MAC /DMACTxCR

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Interpret as DMACTxCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ST)ST 0 (OSF)OSF 0 (TSE)TSE 0TXPBL

Description

Channel transmit control register

Fields

ST

Start or Stop Transmission Command
OSF

Operate on Second Packet
TSE

TCP Segmentation Enabled
TXPBL

Transmit Programmable Burst Length

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data