STMicroelectronics /STM32H7x7_CM7 /GPIOA /GPIO_AFRL

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Interpret as GPIO_AFRL

Description

GPIO alternate function low register

Fields

AFSEL0	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL1	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL2	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL3	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL4	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL5	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL6	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:
AFSEL7	[3:0]: Alternate function selection for port x pin y (y = 0…7) These bits are written by software to configure alternate function I/Os AFSELy selection:

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