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STMicroelectronics /STM32H7x7_CM7 /RAMECC1 /M2FDRL

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Interpret as M2FDRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SEDCF)SEDCF 0 (DEDF)DEDF 0 (DEBWDF)DEBWDF

Description

RAMECC monitor x failing data low register

Fields

SEDCF

ECC single error detected and corrected flag
DEDF

ECC double error detected flag
DEBWDF

ECC double error on byte write (BW) detected flag

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data