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STMicroelectronics /STM32H7x7_CM7 /RCC /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSION)LSION 0 (LSIRDY)LSIRDY

Description

RCC Clock Control and Status Register

Fields

LSION

LSI oscillator enable
LSIRDY

LSI oscillator ready

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data