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STMicroelectronics /STM32H7x7_CM7 /RTC /RTC_ALRMASSR

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Interpret as RTC_ALRMASSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SS0MASKSS

Description

This register can be written only when ALRAE is reset in RTC_CR register, or in initialization mode.This register is write protected. The write access procedure is described in RTC register write protection on page9

Fields

SS

Sub seconds value This value is compared with the contents of the synchronous prescaler counter to determine if Alarm A is to be activated. Only bits 0 up MASKSS-1 are compared.
MASKSS

Mask the most-significant bits starting at this bit … The overflow bits of the synchronous counter (bits 15) is never compared. This bit can be different from 0 only after a shift operation.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data