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STMicroelectronics /STM32H7x7_CM7 /TIM2 /CCMR2_Output

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Interpret as CCMR2_Output

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31282724232019161512118743000000000000000000000000000000000000000000CC3S0 (OC3FE)OC3FE0 (OC3PE)OC3PE0OC3M0 (OC3CE)OC3CE0CC4S0 (OC4FE)OC4FE0 (OC4PE)OC4PE0OC4M0 (O24CE)O24CE0 (OC3M_3)OC3M_30 (OC4M_3)OC4M_3

Description

capture/compare mode register 2 (output mode)

Fields

CC3S

CC3S
OC3FE

OC3FE
OC3PE

OC3PE
OC3M

OC3M
OC3CE

OC3CE
CC4S

CC4S
OC4FE

OC4FE
OC4PE

OC4PE
OC4M

OC4M
O24CE

O24CE
OC3M_3

Output Compare 1 mode - bit 3
OC4M_3

Output Compare 2 mode - bit 3

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data