STMicroelectronics /STM32L0x1 /RCC /APB2SMENR

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Interpret as APB2SMENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSCFGSMEN)SYSCFGSMEN 0 (TIM21SMEN)TIM21SMEN 0 (TIM22SMEN)TIM22SMEN 0 (ADCSMEN)ADCSMEN 0 (SPI1SMEN)SPI1SMEN 0 (USART1SMEN)USART1SMEN 0 (DBGSMEN)DBGSMEN

Description

APB2 peripheral clock enable in sleep mode register

Fields

SYSCFGSMEN

System configuration controller clock enable during sleep mode bit

TIM21SMEN

TIM21 timer clock enable during sleep mode bit

TIM22SMEN

TIM22 timer clock enable during sleep mode bit

ADCSMEN

ADC clock enable during sleep mode bit

SPI1SMEN

SPI1 clock enable during sleep mode bit

USART1SMEN

USART1 clock enable during sleep mode bit

DBGSMEN

DBG clock enable during sleep mode bit

Links

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