Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/STMicroelectronics/STM32L0x2/ADC/CFGR2#0x0
configuration register 2
Oversampler Enable
Oversampling ratio
Oversampling shift
Triggered Oversampling
ADC clock mode
https://github.com/cmsis-svd/cmsis-svd-data