STMicroelectronics /STM32L0x3 /RCC /APB1SMENR

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Interpret as APB1SMENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2SMEN)TIM2SMEN 0 (TIM3SMEN)TIM3SMEN 0 (TIM6SMEN)TIM6SMEN 0 (TIM7SMEN)TIM7SMEN 0 (WWDGSMEN)WWDGSMEN 0 (SPI2SMEN)SPI2SMEN 0 (USART2SMEN)USART2SMEN 0 (LPUART1SMEN)LPUART1SMEN 0 (USART4SMEN)USART4SMEN 0 (USART5SMEN)USART5SMEN 0 (I2C1SMEN)I2C1SMEN 0 (I2C2SMEN)I2C2SMEN 0 (USBSMEN)USBSMEN 0 (CRSSMEN)CRSSMEN 0 (PWRSMEN)PWRSMEN 0 (DACSMEN)DACSMEN 0 (I2C3SMEN)I2C3SMEN 0 (LPTIM1SMEN)LPTIM1SMEN

Description

APB1 peripheral clock enable in sleep mode register

Fields

TIM2SMEN

Timer2 clock enable during sleep mode bit

TIM3SMEN

Timer3 clock enable during Sleep mode bit

TIM6SMEN

Timer 6 clock enable during sleep mode bit

TIM7SMEN

Timer 7 clock enable during Sleep mode bit

WWDGSMEN

Window watchdog clock enable during sleep mode bit

SPI2SMEN

SPI2 clock enable during sleep mode bit

USART2SMEN

UART2 clock enable during sleep mode bit

LPUART1SMEN

LPUART1 clock enable during sleep mode bit

USART4SMEN

USART4 clock enable during Sleep mode bit

USART5SMEN

USART5 clock enable during Sleep mode bit

I2C1SMEN

I2C1 clock enable during sleep mode bit

I2C2SMEN

I2C2 clock enable during sleep mode bit

USBSMEN

USB clock enable during sleep mode bit

CRSSMEN

Clock recovery system clock enable during sleep mode bit

PWRSMEN

Power interface clock enable during sleep mode bit

DACSMEN

DAC interface clock enable during sleep mode bit

I2C3SMEN

2C3 clock enable during Sleep mode bit

LPTIM1SMEN

Low power timer clock enable during sleep mode bit

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