STMicroelectronics /STM32L0x3 /RCC /CCIPR

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Interpret as CCIPR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (USART1SEL0)USART1SEL0 0 (USART1SEL1)USART1SEL1 0 (USART2SEL0)USART2SEL0 0 (USART2SEL1)USART2SEL1 0 (LPUART1SEL0)LPUART1SEL0 0 (LPUART1SEL1)LPUART1SEL1 0 (I2C1SEL0)I2C1SEL0 0 (I2C1SEL1)I2C1SEL1 0I2C3SEL 0 (LPTIM1SEL0)LPTIM1SEL0 0 (LPTIM1SEL1)LPTIM1SEL1 0 (HSI48MSEL)HSI48MSEL

Description

Clock configuration register

Fields

USART1SEL0

USART1SEL0

USART1SEL1

USART1 clock source selection bits

USART2SEL0

USART2SEL0

USART2SEL1

USART2 clock source selection bits

LPUART1SEL0

LPUART1SEL0

LPUART1SEL1

LPUART1 clock source selection bits

I2C1SEL0

I2C1SEL0

I2C1SEL1

I2C1 clock source selection bits

I2C3SEL

I2C3 clock source selection bits

LPTIM1SEL0

LPTIM1SEL0

LPTIM1SEL1

Low Power Timer clock source selection bits

HSI48MSEL

48 MHz HSI48 clock source selection bit

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