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STMicroelectronics /STM32L0x3 /STK /CSR

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Interpret as CSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (TICKINT)TICKINT 0 (CLKSOURCE)CLKSOURCE 0 (COUNTFLAG)COUNTFLAG

Description

SysTick control and status register

Fields

ENABLE

Counter enable
TICKINT

SysTick exception request enable
CLKSOURCE

Clock source selection
COUNTFLAG

COUNTFLAG

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data