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STMicroelectronics /STM32L0x3 /WWDG /CFR

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Interpret as CFR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0W0 (WDGTB0)WDGTB0 0 (WDGTB1)WDGTB1 0 (EWI)EWI

Description

Configuration register

Fields

W

7-bit window value
WDGTB0

WDGTB0
WDGTB1

Timer base
EWI

Early wakeup interrupt

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data