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STMicroelectronics /STM32L100 /ADC /CR2

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Interpret as CR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADON)ADON 0 (CONT)CONT 0 (ADC_CFG)ADC_CFG 0DELS0 (DMA)DMA 0 (DDS)DDS 0 (EOCS)EOCS 0 (ALIGN)ALIGN 0JEXTSEL0JEXTEN 0 (JSWSTART)JSWSTART 0EXTSEL0EXTEN 0 (SWSTART)SWSTART

Description

control register 2

Fields

ADON

A/D Converter ON / OFF
CONT

Continuous conversion
ADC_CFG

ADC configuration
DELS

Delay selection
DMA

Direct memory access mode
DDS

DMA disable selection
EOCS

End of conversion selection
ALIGN

Data alignment
JEXTSEL

External event select for injected group
JEXTEN

External trigger enable for injected channels
JSWSTART

Start conversion of injected channels
EXTSEL

External event select for regular group
EXTEN

External trigger enable for regular channels
SWSTART

Start conversion of regular channels

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data