STMicroelectronics /STM32L1xx /RCC /AHBLPENR

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Interpret as AHBLPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOALPEN)GPIOALPEN 0 (GPIOBLPEN)GPIOBLPEN 0 (GPIOCLPEN)GPIOCLPEN 0 (GPIODLPEN)GPIODLPEN 0 (GPIOELPEN)GPIOELPEN 0 (GPIOHLPEN)GPIOHLPEN 0 (GPIOFLPEN)GPIOFLPEN 0 (GPIOGLPEN)GPIOGLPEN 0 (CRCLPEN)CRCLPEN 0 (FLITFLPEN)FLITFLPEN 0 (SRAMLPEN)SRAMLPEN 0 (DMA1LPEN)DMA1LPEN 0 (DMA2LPEN)DMA2LPEN

Description

AHB peripheral clock enable in low power mode register

Fields

GPIOALPEN

IO port A clock enable during Sleep mode

GPIOBLPEN

IO port B clock enable during Sleep mode

GPIOCLPEN

IO port C clock enable during Sleep mode

GPIODLPEN

IO port D clock enable during Sleep mode

GPIOELPEN

IO port E clock enable during Sleep mode

GPIOHLPEN

IO port H clock enable during Sleep mode

GPIOFLPEN

IO port F clock enable during Sleep mode

GPIOGLPEN

IO port G clock enable during Sleep mode

CRCLPEN

CRC clock enable during Sleep mode

FLITFLPEN

FLITF clock enable during Sleep mode

SRAMLPEN

SRAM clock enable during Sleep mode

DMA1LPEN

DMA1 clock enable during Sleep mode

DMA2LPEN

DMA2 clock enable during Sleep mode

Links

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