STMicroelectronics /STM32L1xx /RCC /APB1LPENR

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Interpret as APB1LPENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2LPEN)TIM2LPEN 0 (TIM3LPEN)TIM3LPEN 0 (TIM4LPEN)TIM4LPEN 0 (TIM6LPEN)TIM6LPEN 0 (TIM7LPEN)TIM7LPEN 0 (LCDLPEN)LCDLPEN 0 (WWDGLPEN)WWDGLPEN 0 (SPI2LPEN)SPI2LPEN 0 (USART2LPEN)USART2LPEN 0 (USART3LPEN)USART3LPEN 0 (I2C1LPEN)I2C1LPEN 0 (I2C2LPEN)I2C2LPEN 0 (USBLPEN)USBLPEN 0 (PWRLPEN)PWRLPEN 0 (DACLPEN)DACLPEN 0 (COMPLPEN)COMPLPEN

Description

APB1 peripheral clock enable in low power mode register

Fields

TIM2LPEN

Timer 2 clock enable during Sleep mode

TIM3LPEN

Timer 3 clock enable during Sleep mode

TIM4LPEN

Timer 4 clock enable during Sleep mode

TIM6LPEN

Timer 6 clock enable during Sleep mode

TIM7LPEN

Timer 7 clock enable during Sleep mode

LCDLPEN

LCD clock enable during Sleep mode

WWDGLPEN

Window watchdog clock enable during Sleep mode

SPI2LPEN

SPI 2 clock enable during Sleep mode

USART2LPEN

USART 2 clock enable during Sleep mode

USART3LPEN

USART 3 clock enable during Sleep mode

I2C1LPEN

I2C 1 clock enable during Sleep mode

I2C2LPEN

I2C 2 clock enable during Sleep mode

USBLPEN

USB clock enable during Sleep mode

PWRLPEN

Power interface clock enable during Sleep mode

DACLPEN

DAC interface clock enable during Sleep mode

COMPLPEN

COMP interface clock enable during Sleep mode

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