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STMicroelectronics /STM32L4R5 /DMA2D /ISR

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Interpret as ISR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TEIF)TEIF 0 (TCIF)TCIF 0 (TWIF)TWIF 0 (CAEIF)CAEIF 0 (CTCIF)CTCIF 0 (CEIF)CEIF

Description

Interrupt Status Register

Fields

TEIF

Transfer error interrupt flag
TCIF

Transfer complete interrupt flag
TWIF

Transfer watermark interrupt flag
CAEIF

CLUT access error interrupt flag
CTCIF

CLUT transfer complete interrupt flag
CEIF

Configuration error interrupt flag

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data