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STMicroelectronics /STM32L4R5 /DSI /DSI_PCTLR

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Interpret as DSI_PCTLR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DEN)DEN 0 (CKE)CKE

Description

DSI Host PHY Control Register

Fields

DEN

Digital Enable
CKE

Clock Enable

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data